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Hardware specification for Rocket-IO Serial Link.Rev1.4 - download pdf or read online

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Extra info for Hardware specification for Rocket-IO Serial Link.Rev1.4

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When data is available it sets up a locallink transfer. The size of the transfer is the number of data available at that point in the FIFO. Document No. 1. Input/output data Name Dir Description clk in Clock input: All signals are synchronous to this clock. rst in Reset input Active high fifo_data[:] in Fifo data bus fifo_rd out Fifo read. Reads data from the FIFO fifo_level[:] in Fifo level. Indicates the amount of data in the FIFO ll_sof_n out Start of Frame: Indicates the first transfer for a given frame.

4 21/06/06 Page 47 of 24 The gigabit transceiver multiplies the reference frequency provided on the reference clock input (REFCLK) by 20. The multiplication of the clock is achieved by using a fully monolithic PLL that does not require any external components. 2. Clock and Data Recovery The clock/data recovery (CDR) circuits will lock to the reference clock automatically if the data is not present. For proper operation, the frequency of the reference clock must be within ±100ppm of the nominal frequency.

When data is available it sets up a locallink transfer. The size of the transfer is the number of data available at that point in the FIFO. Document No. 1. Input/output data Name Dir Description clk in Clock input: All signals are synchronous to this clock. rst in Reset input Active high fifo_data[:] in Fifo data bus fifo_rd out Fifo read. Reads data from the FIFO fifo_level[:] in Fifo level. Indicates the amount of data in the FIFO ll_sof_n out Start of Frame: Indicates the first transfer for a given frame.

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Hardware specification for Rocket-IO Serial Link.Rev1.4


by Kevin
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