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If active channels are used (MUX2 in ADMUX set), the 47 1187F–AVR–06/05 channel must be selected before entering Free Running mode. Selecting an active channel after entering Free Running mode may result in undefined operation from the ADC. • Bit 4 – ADIF: ADC Interrupt Flag This bit is set (one) when an ADC conversion completes and the Data Registers are updated. The ADC Conversion Complete Interrupt is executed if the ADIE bit and the Ibit in SREG are set (one). ADIF is cleared by hardware when executing the corresponding interrupt handling vector.

When the BODEN Fuse is programed “0”, the Brown-out Detector is enabled. See “Brown-out Detection” on page 17. Default value is unprogrammed “1”. • When the SPIEN Fuse bit is programmed “0”, Low-voltage Serial Program and Data Downloading is enabled. Default value is programmed “0”. Unprogramming this fuse while in the Low-voltage Serial Programming mode will disable future In-System downloading attempts. • When the RSTDISBL Fuse is programmed “0”, the External Reset function of pin PB5 is disabled(1).

Bit 2 – EEMWE: EEPROM Master Write Enable The EEMWE bit determines whether setting EEWE to one causes the EEPROM to be written. When EEMWE is set (one), setting EEWE will write data to the EEPROM at the selected address. If EEMWE is zero, setting EEWE will have no effect. When EEMWE has been set (one) by software, hardware clears the bit to zero after four clock cycles. See the description of the EEWE bit for an EEPROM write procedure. • Bit 1 – EEWE: EEPROM Write Enable The EEPROM Write Enable Signal – EEWE – is the write strobe to the EEPROM.

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8-bit AVR Microcontroller with 1К Byte Flash ATtiny15L

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